Differential signals are used for inexpensive, high speed, low power, and noise immune communication. Differential signal pairs have complementary voltage components transitioning in potential in opposite directions. This complementary transitioning allows communication with signals at lower peak-to-peak voltages since receivers can have input thresholds more optimally controlled than single ended detectors. The lower voltage swings mean lower power requirements.
Differential threshold detection typically involves a detector circuit taking, as input, a differential input signal component and producing a voltage or current quantity in response to changes in that input signal. The detector duplicates the generation of an electrical response for the opposite (complementary) component of the input signal and combines the two components in an interconnecting network to provide a complete detection means. The detector can take advantage of the two voltage or current quantities, operating complementarily, to heighten sensitivity and require less peak-to-peak magnitude at the inputs for detection. Additionally, most differential detection circuits do not respond significantly to identical changes in the input pairs that may be induced by noise, process, or temperature influences. Ideally, when both signals have a similar positive or negative constituent, the differential detector tracks the similar constituents equally and does not add a response due to the similar constituents to the output difference signal. This effect is known as a common mode rejection capability.
In other differential detection techniques, current mirrors bias long channel transistor pairs in saturation to provide currents to process. Differential signal components applied to complementary transistors provide current steering of these quantities. In the limit, as the input voltage components range in opposition, one side hoards all the current and the other branch is open and non-conductive. In this way, a single signal transition is detected. Through symmetry of the circuit, complementary signal transitions are detected. Maximum amplifier gain is achieved when both devices are in saturation for as much of the input signal transition as possible. This maximizes power consumption. A more desirable technique would accomplish a similar detection result with less power.
Attempts to improve differential signal detectors can be found. For example, U.S. Pat. No. 5,939,904 to Fetterman et al. describes a regulating device for controlling common-mode voltages in a differential buffer. A common-mode output voltage is driven to a selected value by supplying two currents, of opposite polarities, to an output of the differential buffer. A resulting output voltage is sensed and a second current adjusted to give a desired common-mode output voltage. U.S. Pat. No. 6,175,226 to Clerici et al. describes a fully differential amplifier with a current mirror providing regulation for an output voltage of the amplifier. The output voltage of the differential amplifier remains fixed at a value of a reference voltage applied to the regulating branch of the current mirror. U.S. Patent Application Publication No. 2002/0070767 to Therisod describes a high frequency detector circuit, which includes a differential amplifier with a biasing network across the differential inputs. A biasing network midpoint is connected to an output transistor. The output transistor regulates when the differential amplifier turns on, based on the input differential voltage signal.
However, these references all suffer disadvantages in at least one of the following areas: allow for the application of a reference current to generate a shift in voltage of a differential signaling structure enabling setting precisely calibrated levels of detection; create paired high-level and low-level signal sets, mutually calibrated from a single source, suitable for direct application to a voltage overlap detector with a limited number of devices to minimize circuitry; and allow for the generation of shifted and non-shifted voltage pairs with precision in reduced voltage supply and limited bandwidth environments encountered in present integrated circuit chip technologies.
With respect to FIG. 1, a prior art front-end voltage level shifter 100 is shown. A positive component of a differential voltage pair is input to a first differential input 110 (VP). The first differential input 110 connects to two operational amplifiers. A first operational amplifier 120a provides a phase shift of the input signal at the positive differential—low terminal 130 (VPL). A second operational amplifier 120b is connected with a first shifting voltage source 140. The second operational amplifier 120b produces an output at a positive differential—high terminal 135 (VPH) that is shifted by the magnitude of the first shifting voltage source 140 and that is in phase with the output at the positive differential—low terminal 130.
In further regard to FIG. 1, a negative component of a complementary differential voltage pair is connected to a negative differential input 150 (VM). At the negative differential input 150, circuitry is connected that is symmetrical to that described, supra, in the processing of the positive component. Processing of the negative component occurs similarly, but shifted in phase by 180° compared to the description of the positive component. Complementary differential voltages are produced at a negative differential—low terminal 170 (VML) and a negative differential—high terminal 175 (VMH).
Relative to FIG. 2, a complementary differential voltage pair is composed of a positive component 210 and an opposite or negative component 250. Both components may vary in potential within a peak-to-peak differential voltage 239 (VP-P) range. The peak-to-peak magnitude of a differential voltage 239 ranges from a maximum of a differential voltage maximum level 240 (VH) to a minimum of a differential voltage minimum level 245 (VL). The positive component 210 of a complementary differential voltage pair is applied, for example, to the positive differential input 110 of the front-end voltage level shifter 100 and the negative component 250 of a complementary differential voltage pair is applied to the negative differential input 150 as detailed supra.
However, independent operational amplifiers, like the four required in FIG. 1, mean that individual and independent offset factors may be introduced and that a significant number of devices are required to implement the four circuits. This approach requires increased area on the integrated circuit and power that are expensive to implement. Additionally, so many independent devices are unwieldy for maintaining close tracking tolerances in the output voltages.
Therefore, what is needed is: a design providing a means of regulating the shift voltage of the front-end voltage shifter with close tracking amongst the voltages produced; avoidance of multiple independent voltage offset constituents; and an implementation of a voltage detector with fewer devices. It is additionally desirable to produce a design of a front-end shifter that does not require a network of active devices with their ensuing voltage threshold requirements. Such active devices are unable to scale with an ever-lowering supply voltage.